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iti jobs in delhi Alp Management Consultants Pvt Ltd |
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Posted on : 2011-06-09 01:02:42
Job
ID: 10686525 |
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| Experience : |
( 1 - 6 yrs.) |
| Location : |
Noida |
| Education
Qualification : |
UG - Any Graduate - Any Specialization
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| Industry Type
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Semiconductors |
| Key
Skills : |
A
Verification & Circuit Design of Memory & Memory blocks Experience with circuit design, IC layout, UNIX scripts, and CAD verification, Understanding of key SRAM blocks viz. Sense Amplifiers, Row Decoders, IOs etc, Understanding of SRAM/ROM architecture, Understanding of semi-conductor design and manufacturing, Proficient in DRC/LVS/parasitic extraction/Spice simulations, Knowledgeable in design rule analysis, parasitic extraction, noise & crosstalk issues, yield improvement and manufacturability issues and design for test principles Postion-2 Memory Lead-Memory Back-End Lead / Expert Exposure to Memory Back-end Compiler development Exposure to Layout Tiling, Netlist Tiling #Electronics Engg, Exposure to CMOS fundamentals, Exposure to VLSI design, Knowledge of design principles and practices, Experience with, IC layout, UNIX scripts, and CAD verification,Understanding of key SRAM blocks Knowledgeable in design rule analysis, parasitic extraction, noise & crosstalk issues, yield improvement and manufacturability issues and design for test principles
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| Job Type : |
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| Annual Salary
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NA |
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Job Summary |
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Verification & Circuit Design of Memory & Memory blocks Experience with circuit design, IC layout, UNIX scripts, and CAD verification, Understanding of key SRAM blocks viz. Sense Amplifiers, Row Decoders, IOs etc, Understanding of SRAM/ROM architecture, Understanding of semi-conductor design and manufacturing, Proficient in DRC/LVS/parasitic extraction/Spice simulations, Knowledgeable in design rule analysis, parasitic extraction, noise & crosstalk issues, yield improvement and manufacturability issues and design for test principles Postion-2 Memory Lead-Memory Back-End Lead / Expert Exposure to Memory Back-end Compiler development Exposure to Layout Tiling, Netlist Tiling #Electronics Engg, Exposure to CMOS fundamentals, Exposure to VLSI design, Knowledge of design principles and practices, Experience with, IC layout, UNIX scripts, and CAD verification,Understanding of key SRAM blocks Knowledgeable in design rule analysis, parasitic extraction, noise & crosstalk issues, yield improvement and manufacturability issues and design for test principles
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Job Description |
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Verification & Circuit Design of Memory & Memory blocks Experience with circuit design, IC layout, UNIX scripts, and CAD verification, Understanding of key SRAM blocks viz. Sense Amplifiers, Row Decoders, IOs etc, Understanding of SRAM/ROM architecture, Understanding of semi-conductor design and manufacturing, Proficient in DRC/LVS/parasitic extraction/Spice simulations, Knowledgeable in design rule analysis, parasitic extraction, noise & crosstalk issues, yield improvement and manufacturability issues and design for test principles Postion-2 Memory Lead-Memory Back-End Lead / Expert Exposure to Memory Back-end Compiler development Exposure to Layout Tiling, Netlist Tiling #Electronics Engg, Exposure to CMOS fundamentals, Exposure to VLSI design, Knowledge of design principles and practices, Experience with, IC layout, UNIX scripts, and CAD verification, Understanding of key SRAM blocks Knowledgeable in design rule analysis, parasitic extraction, noise & crosstalk issues, yield improvement and manufacturability issues and design for test principles
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Company Profile |
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\r\n \r\n Top semiconductor MNC, Noida\r\n
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Contact Details |
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| Company
Name : |
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| Email
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mini.m@alpconsulting.inm |
| Phone No : |
011-39815122 |
| Address : |
Alp Management Consultants
011-39815122
(@) mini.m@alpconsulting.in
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